================================================================================ Intel(R) Server Platform BIOS Release Notes ================================================================================ INTEL(R) Server Boards and Systems Intel Corporation 2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA ================================================================================ DATE : August 20, 2024 TO : Multi-Core Intel(R) Xeon(R) Processor-Based Server Platform customers SUBJECT : BIOS Release notes ================================================================================ LEGAL INFORMATION ================================================================================ Information in this document is provided in connection with Intel Products and for the purpose of supporting Intel developed server boards and systems. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. 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Copyright (C) 2024 Intel Corporation. ================================================================================ ABOUT THIS RELEASE ================================================================================ Build Stamp: SE5C741.86B.01.02.0002 Build Date: Aug 5 2024 ================================================================================ Supported Platforms ================================================================================ M50FCP Family R01.02.0002_FoxCreekPass_EBG_EMR_PFR_prd.bin Checksum: 0x3357305C SFID offset: 0x7D0024 SFID value: 0x86122f34 ================================================================================ BIOS COMPONENTS/CONTENTS ================================================================================ Processors supported: Xeon Scalable Family Processor Microcode versions: CPUID Version Stepping m_87_c06f* 0x21000240 EMR A*/R* m_10_806f8 0x2c0003A1 HBM B* m_87_806f* 0x2b0005D1 SPR E*/S* RSTeSataEfi: v8.5.0.1096 RSTesSataEfi: v8.5.0.1096 BIOSACM: Production,v1.1.A_PW ACTM: Production,actm_emr_00.90.00_PW_prod_signed SINIT: Production,v1.1.A_PW VMDDxeEfi v8.5.0.1096 RSTeSataRaidEfi: v8.5.0.1096 AspeedVideo_2600: v8.01.11.02 BiosGuard: BIOSGuard_pc_2.0.218 SPS: SPS_E5_06.01.04.047.0 Production_PMCP: EBG_B0_PMC_FW_152.00.01.0020_Production PCH PFR SVN: 3 S3M_FW: s3m_fw_ProdEncr_ProdSigned_SESVN0x1_SVN0x1_REVID0x1e S3M_FW_EMR: s3m_fw_ProdEncr_ProdSigned_SESVN0x1_SVN0x1_REVID0x20 CFR_PUCode_EMR_A1: cfr_active_encrypt_signed_31000030 CFR_PUCode_EMR_MCC_R1: cfr_active_encrypt_signed_33000010 CFR_PUCode_E0: cfr_active_encrypt_signed_1e0000a0 CFR_PUCode_E2: cfr_active_encrypt_signed_1f0000a0 CFR_PUCode_E3: cfr_active_encrypt_signed_19000070 CFR_PUCode_E4: cfr_active_encrypt_signed_3a000050 CFR_PUCode_E5: cfr_active_encrypt_signed_3b000020 CFR_PUCode.MCC_S0: cfr_active_encrypt_signed_120000d0 CFR_PUCode.MCC_S1: cfr_active_encrypt_signed_18000070 CFR_PUCode.MCC_S2: cfr_active_encrypt_signed_39000070 CFR_PUCode.MCC_S3: cfr_active_encrypt_signed_38000060 CFR_PUCode.LCC_U0: cfr_active_encrypt_signed_15000090 CFR_PUCode.LCC_U1： cfr_active_encrypt_signed_37000030 CFR_PUCode_HBM_B0: cfr_active_encrypt_signed_130000c0 CFR_PUCode_HBM_B1: cfr_active_encrypt_signed_16000080 CFR_PUCode_HBM_B2: cfr_active_encrypt_signed_17000040 CFR_PUCode_HBM_B3: cfr_active_encrypt_signed_3c000040 TDX: TDX_1.5.05.46_PRODUCTION_SIGN ================================================================================ INSTALLATION NOTES ================================================================================ WARNING: It is very important to follow these instructions as they are written. Failure to update using the proper procedure may cause damage to your system. Firmware Update Tools: Sysfwupdt User can update BIOS flash image via either of the follow methods... A. UEFI sysfwupdt 1. Copy the entire contents of the SUP package to the HDD or USB flash drive. (All of the files in the package must reside in the same directory.) 2. Boot to UEFI Shell, then change the Shell to mapped device file system Example: Shell> fs0: (or fs1:) 3. Run UpdBIOS_FCP.nsh (or startup.nsh to full installation of the SUP, CPLD, BMC, FRU & BIOS) 4. Reboot system after the update is completed. 5. Do *NOT* interrupt the BIOS POST during the first boot. B. BMC Web Console 1. Open BMC Web Console and login 2. Go to Configuration > BIOS/IFWI Firmware Update 3. if desired select Recovery and/or Reset Immediately checkboxes 4. Choose the File (XXX_EBG_SPR_UpdateCapsule_prd.bin) 5. Upload 6. BIOS will be updated on the next reboot (if Reset Immediately checkbox was not selected). 7. Do *NOT* interrupt the BIOS POST during the first boot. ================================================================================ SVN_BYPASS Jumper ================================================================================ The platform does not support flash PCH capsule with a high SVN to a lower SVN, BIOS SVN Downgrade jumper (J19) must be enabled to allow that PCH capsule file can be online updated to a lower SVN 1. Power off the system. 2. Move the BIOS SVN Downgrade jumper (J19) to enable pins 2-3. Details regarding the jumper ID and location can be obtained from the M50FCP Board TPS. 3. Power ON the system, boot to BIOS setup. 4. At Main->PFR page, check "PCH SVN Bypass Jumper Status: ON". 5. Boot to shell, flash PCH capsule by command: sysfwupdt.efi -u xxx.bin -recovery. 6. After BIOS update successfully completed, power off the system 7. Move the BIOS SVN Downgrade jumper (J19) to default pins 1-2. 8. Power on the system. ================================================================================ IMPORTANT NOTICE ================================================================================ 1. VT-D is enabled by default in BIOS from this IFWI release, if you are still using Windows2019, please disable VT-D and Extended APIC or enable “Limit CPU PA to 46 bits” to avoid BSOD under Windows2019. Advanced ->Integrated IO Configuration -> Intel VT for Directed I/O (VT-d) Advanced -> Processor Configuration -> X2APIC Advanced -> Processor Configuration -> Limit CPU PA to 46 bits 2. VT-D and X2APIC are bundled, please disable X2APIC first when you want to disable VTD. 3. From version R01.01.0001 "Volatile Memory Mode" default value is changed from 2LM (2LM is removed) to 1LM due to silicon code change, user must add parameter “UpdateNvram” when online update from lower versions to R01.01.0003. The UpdBIOS_FCP.nsh script in this package contains the parameter UpdateNvram to update online BIOS (e.g. sysfwupdt.efi -u xxx.bin UpdateNvram) Caution: This UpdateNvram parameter will update NVRAM region and restore the BIOS to default settings. 4. User must add parameter "-recovery" when updating BIOS to the version with higher SVN, otherwise online update will fail. 5. Please notice SPR D stepping is EOL, IFWI will not support it starting from 9409.D03. 6. R01.02.0001 is the first version to support Intel(R) Xeon(R) Scalable Family Processor 4th and 5th generation. Please add the flash parameter -recovery and UpdateNvram from R01.01.0005 or older. 7. To support New VROC RAID Key, user needs to upgrade BMC version to 1.91 or later. 12. EMR A0/R0 Processors are no longer supported from BIOS 9535D03 or later. 13. From R01.02.0001 has updated PCH SVN to 03, If a FW downgrade is required refer to the SVN_Bypass Jumper enabling. 14. User needs to upgrade BIOS to R01.02.0001 first before upgrading BIOS Customized CAP file due to BIOS CAP internal security key upgrade. * Upgrade BIOS to R01.02.0001 * Reboot system (after that, the new BIOS will take effect and it supports the new key) * Upgrade BIOS Cap file - CAPSULE_Customized_signed.cap ================================================================================ KNOWN ISSUES/WORKAROUND ================================================================================ 1. Once enabling "Promote Warning", please do not use the Samsung Memory with date code WW34 2021. 2. CXL PkgC is not supported because L1 is not supported within the CPU's CXL modules. Thus "Package C State" in "CPU C State Control" needs to be set to "C0/C1 state" when using a CXL device. ================================================================================ CHANGE LIST ================================================================================ R01.02.0002 ================================================================================ 1. Replace MiTAC Root Key for ITK File This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.109.D.34 (UPLR1 OOB) 2. PSIRT PTK0004845 GenerationSetup - Information disclosure vulnerability 3. PSIRT PTK0004850 OutOfBandXML - Information disclosure vulnerability 4. PSIRT PTK0004851 OutofBandFeature - Information disclosure vulnerability 5. PSIRT PTK0004856 When in SMM mode, the status of get variable is not checked 6. BTS: FCP#131, DNP#135 The Help text of "Correctable Error Threshold" needs to improve due to the default value changing. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.109.D.34 (UPLR1 OOB) 7. BTS: FCP#125, DNP#129 There is "Intel(R) Optane(TM) PMem Setting" page in servertool. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.109.D.34 (UPLR1) 8. PSIRT PTK0004706 Improper Input Validation in SmbiosOobMdr2 may result in information disclosure 9. PSIRT PTK0004531 DNP - SmiVariable driver: Intel Server SMM vulnerability 10. BTS: FCP#112 Slot Designation of SMBIOS type9 does not match silkscreen on RISER1_2U_1Slot_w/RT. 11. BTS: FCP#113 New DB to support Mitac key. 12. BTS: FCP#117 Expose CXL knobs to support CXL type 3 device. 13. CCB#4822 Add PRSCapability setup knob 14. CCB#4841 Change the default value for 'Correctable Error threshold' and 'Trigger SW Error Threshold' 15. Intel security advisories are already in this version as below. Intel-SA-01046, Intel-SA-01036, Intel-SA-01070, Intel-SA-01073, Intel-SA-01076, Intel-SA-01078 This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.109.D.34 (UPLR1) ================================================================================ R01.02.0001 ================================================================================ IPU 2024.1 for SPR fixes are included on this FW release: [IPU2024.1]INTEL-SA-00972: Non-transparent sharing of return predictor targets between contexts in some Intel® Processors may allow an authorized user to potentially enable information disclosure via local access. [IPU2024.1]INTEL-SA-00982: Trusted Execution Configuration Register Access [IPU2024.1]INTEL-SA-00960: Error Injection and Intel® Hyper-Threading Disabled 1. Change SVN number is 3 2. BIOS copyright be updated to 2024 3. BTS: FCP#91, DNP#95 There is a CPU SMI time-out event after setting the new password via syscfg with the command syscfg /bap (old password) (new password). This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.107.D.52 4. BTS: DNP#86 "Signed Driver Check (CheckLogo)" test failed under windows server 2022 5. Add Two hot-fixes for Intel Known issue. - Signed Driver (Logo) WHQL Test Will Fail on Device ACPI/INTC107F - Production Intel SGX Attestation may fail on Emerald Rapids Production Samples This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.107.D.52 6. PSIRT PTK0004513 Stack buffer overflow leads to arbitrary code execution in a DXE driver 7. PSIRT PTK0004533 PprRequestLog: Intel Server vulnerablility. 8. BTS: FCP#69, DNP#66 SUT is rebooting over and over with CPU Q3W6 after set SW Guard Extensions(SGX) to Enabled. 9. Correct the port mapping string for "TxEq Override mode" knobs in PCIe Misc. Configuration (Denali Pass) This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.107.D.52 10. PSIRT PTK0004402 The memory buffer used by “UserAuthenticationSmm.inf” is not checked. 11. PSIRT PTK0004403 DataSize needs to reinitialize for another GetVariable with different variable name. 12. PSIRT PTK0004480 Buffer needs to be checked before using. 13. CCB#4826 Add support for new VROC RAID Key 14. Add the ITK Key with the extended valid date. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.107.D.52 This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.106.D.62 15. BTS: FCP#58 Support MiTAC Root Key for ITK File 16. Fix Coverity Issue ID2673702, Out-of-bounds access. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.105.D.74 This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.105.D.48 17. CCB#4824 CPLD will trigger OBB timeout when updating RTM FW over 25 minutes. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.105.D.20 18. BTS: FCP#27, DNP#31 Can't Boot to Windows 2022 correctly with EMR CPU Q2SR 19. BTS: FCP#34 Memory Speed Selection up to 5600. 20. BTS: FCP#38, DNP#35 The Active Processor Cores can't be set to above 55 cores. 21. BTS: FCP#41 Link width of Intel OCP3.0 E810-CQDA2 is x4 on FCP. 22. BTS: FCP#40, DNP#36 There is no an error of variable reclaimed on Error Manager of BIOS Setup after do "Reboot SUT" by command "reset" on UEFI Internal Shell with CPU CPU Q2SR. 23. BTS: FCP#42, DNP#37 The Patrol scrub register isn’t 1 when Patrol scrub is set to Enable at the End of POST. 24. BTS: FCP#44 SUT will halt at 0x07 after flashing BIOS 9528D04_SPRSDP_dev. 25. CCB#3670 Need ability to clear and change BIOS admin password over Redfish. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.104.D.47 26. BTS: FCP#26, DNP#30 There is one Yellow Mark in Windows 2022 with EMR CPU. 27. BTS: FCP#31 Add TxEq items in GenerationSdpConfiguration to control TxEq settings when build SDP BIOS 28. BTS: FCP#30 "HW Validation Test only" is present in BIOS Setup Menu 29. BTS: FCP#29 UPI speed is unknown. 30. Hsd-es: 15012997376 Remove PMEM Items from EGS BIOS. This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.104.D.25 31. Hsd-es: 2103658030 Riser2 interposer bifurcation doesn't change to x8x4x4 on ITP after setting Riser2_Slot2 Bifurcation to via Setup UI. 32. Hsd-es: 15013347473 On Denali Pass, Redfish Host Interface name can't be found in /sys/bus/usb/devices in SLES 15 SP4 33. Hsd-es: 22017955759 Setting bifurcation to x2 in BIOS shows as x4 instead 34. Hsd-es: 14019090517 Enable Reserved Memory Reporting (RMRR) in FCP BIOS 35. Hsd-es: 22018204723 System BIOS set to 1LM but booting HBM memory in 2LM mode. 36. Hsd-es: 2103654782 There is "PCIeCorrectableReceiverError" redfish event with LC OAM SKU during power cycling test This release is mapping to RP release Reference code version: EGLSTRM.0.RPB.103.D.42 This release is base on SPR 9525D25. ================================================================================ R01.01.0005 ================================================================================ 1. Hsd-es: Change BIOS ID to SE5C741.86B.01.01.0005 2. Hsd-es: 2103657758 Hide C1E when Optimized Power Mode set to Enabled 3. Hsd-es: 15012814795 [Redfish]Some values of some BIOS registration attributes does not match the actual situation. 4. Hsd-es: 15013075175 SMBIOS type 17 of disabled DIMM show incorrect AssetTag 5. Hsd-es: 15013124284 Check PPR repair status before log SEL 6. Hsd-es: 2103657719 DDR5 PPR variable data has been cleared on HBM sku. 7. Hsd-es: 15013038846 Align IFWI id and Work Week time zone to local time zone. 8. Hsd-es: 15013050836 Change "ITK" to "BIOS" in Clear Setting message 9. Hsd-es: NA Align Errorcode Message with EPS ================================================================================ R01.01.0004 ================================================================================ 1. First Production Release 2. Hsd-es: NA Change BIOS ID to SE5C741.86B.01.01.0004 3. Hsd-es: Fix processor information display error cased by pr39684 4. Hsd-es: 15013015241 Fix incorrect 8501 and 8502 error code caused by "WARN_DIMM_NOT_IN_DDRT_POR_DDR_TABLE". 5. Hsd-es: 15013024551 CPLD WD Reset for Retimer Update for SDP only 6. Hsd-es: 2103655983 CPLD will trigger OBB timeout when updating RTM FW over 25 minutes. 7. Hsd-es: NA Add VrocSwLicense Driver 8. Hsd-es: EGS-SPR Reduced UMA Based clustering modes per EGS population 9. Hsd-es: 16019805833 System Fails to boot with specific set of knobs changes from ITK 10. Hsd-es: 15012705004 Enhance SMBIOS Type 9 to support multiple PCI root port within the same slot 11. Hsd-es: 15012878351 Update BIOS Splash Screen file on DSG FCP/DNP. 12. Hsd-es: 22016516982 Expose "C1 Auto Demotion" in ITK 13. Hsd-es: Code Sync to IFWI 2023.07.2.03 Orange Release BIOS 9409.P28 =============================================================================== REFERENCE MATERIAL =============================================================================== [Intel® Server Board D50DNP and M50FCP Family BIOS Setup Utility User Guide] https://www.intel.com/content/www/us/en/content-details/733108/content-details.html